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<head><meta charset="utf-8"><title>REX.W prefix · project-inline-asm · Zulip Chat Archive</title></head>
<h2>Stream: <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/index.html">project-inline-asm</a></h2>
<h3>Topic: <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html">REX.W prefix</a></h3>

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<a name="236666731"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236666731" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Soveu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236666731">(Apr 29 2021 at 12:48)</a>:</h4>
<p>Is there a way to add REX.W prefix for some x64 instructions (except for <code>.byte 0x48</code>)?<br>
Context: I was surprised that <code>retf</code> instruction on x64 target doesn't have it by default</p>



<a name="236667032"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236667032" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Amanieu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236667032">(Apr 29 2021 at 12:50)</a>:</h4>
<p>That's up to the assembler, not rustc.</p>



<a name="236667115"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236667115" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Amanieu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236667115">(Apr 29 2021 at 12:52)</a>:</h4>
<p><a href="https://sourceware.org/binutils/docs/as/i386_002dPrefixes.html">https://sourceware.org/binutils/docs/as/i386_002dPrefixes.html</a></p>



<a name="236667159"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236667159" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Amanieu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236667159">(Apr 29 2021 at 12:52)</a>:</h4>
<p>Apparently you can generate <code>rex</code> prefixes manually.</p>



<a name="236667184"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236667184" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Amanieu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236667184">(Apr 29 2021 at 12:52)</a>:</h4>
<p>Not sure if LLVM's internal assembler supports it though.</p>



<a name="236668516"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236668516" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Soveu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236668516">(Apr 29 2021 at 13:03)</a>:</h4>
<p><span class="user-mention silent" data-user-id="143274">Amanieu</span> <a href="#narrow/stream/216763-project-inline-asm/topic/REX.2EW.20prefix/near/236667032">said</a>:</p>
<blockquote>
<p>That's up to the assembler, not rustc.</p>
</blockquote>
<p>I'm talking about inline asm in rust</p>



<a name="236668788"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236668788" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Soveu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236668788">(Apr 29 2021 at 13:04)</a>:</h4>
<p><code>rex retf</code> just errors with <code>invalid instruction mnemonic</code></p>



<a name="236669036"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236669036" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Soveu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236669036">(Apr 29 2021 at 13:06)</a>:</h4>
<p>but it doesn't have anything against <code>lock retf</code> :D</p>



<a name="236704961"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236704961" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jacob Lifshay <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236704961">(Apr 29 2021 at 16:33)</a>:</h4>
<p>maybe write <code>retfq</code>?</p>



<a name="236737672"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/216763-project-inline-asm/topic/REX.W%20prefix/near/236737672" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Soveu <a href="https://rust-lang.github.io/zulip_archive/stream/216763-project-inline-asm/topic/REX.2EW.20prefix.html#236737672">(Apr 29 2021 at 20:13)</a>:</h4>
<p>oh, that works, thanks</p>



<hr><p>Last updated: Aug 07 2021 at 22:04 UTC</p>
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